Launching ChipletOS Photonic Signoff (alpha) — 6 primitives, AI-native distribution
Today we ship the ChipletOS Photonic Signoff sub-brand alpha as a Research Preview. Six primitives, five vendor exporters, AIM-Photonics-class DRC live, four MCP tools, and a transparent roadmap. Honest scope: this is an analytical physics engine (~21% mean error vs FDFD-grade references); the trained AI surrogate is pending the FDTD corpus. One platform, two markets.
Why a sub-brand and not a separate product
The chiplet glass-TGV platform and the silicon-photonic IC platform share 80% of their infrastructure: validation suite, retraction registry, model registry, multi-vendor exporter pattern, conformal-CI surfacing, MCP distribution layer, the entire audit tooling tree. Splitting them across two repos would duplicate every validation check and double the buyer-DD surface for no buyer benefit. So we kept them under one umbrella — ChipletOS — and named the optical lane ChipletOS Photonic Signoff.
The strategic upside: one platform, two markets. The acquirer pool widens to include Synopsys (owns Lumerical, ~$80M photonic EDA revenue), ANSYS (no AI-EDA story), and Photon Design (partnership-natural). The chiplet acquirer pool already includes Cadence, Intel Foundry, Corning, and Absolics. Cross-pollination wins both sides.
Six primitives, per-primitive surrogate architecture
All six photonic primitives run the analytical physics engine today (~21% mean error vs FDFD-grade references, honestly disclosed). Trained AI surrogates (target ≥ 99% R² vs reference solver) are pending the FDTD training corpus. Per-primitive planned architecture matches the input/output shape:
| Primitive | Analytical (today) | Surrogate target |
|---|---|---|
| Waveguide | Closed-form analytical model | Analytical today; higher-fidelity refresh on the roadmap |
| MZI | Arm-imbalance phase | Planned AI surrogate (Conv1D-MLP, spectrum; pending FDTD corpus) |
| MMI | Self-imaging length | Planned AI surrogate (MLP; pending FDTD corpus) |
| Ring resonator | Add-drop transfer fn | Planned AI surrogate (FNO, resonant; pending FDTD corpus) |
| Grating coupler | 1D analytical pitch + duty | Planned AI surrogate (MLP; pending FDTD corpus) |
| Photonic crystal | 2D band-gap stub | Planned AI surrogate (GraphSAGE, lattice; pending FDTD corpus) |
Five vendor exporters
Same multi-vendor exporter discipline as the chiplet stack's 5/5 EDA adapters: Lumerical .lsf, Photon Design Omnisim XML, ANSYS Lumerical-FDTD INI, KLA Kandela XML, and the foundry-universal GDSII. Each exporter has a roundtrip cert and a customer-side native-validation doc — bit-perfect native cert in Lumerical or Omnisim requires a customer-side license, which is exactly the same posture the chiplet stack uses for Sigrity, HSPICE, ADS, HyperLynx, and HFSS.
AIM-Photonics-class DRC live
Design-rule check (live). AIM-Photonics-class DRC suite (8 rules): minimum waveguide width, bend-radius vs material, ring gap, grating pitch, MMI taper angle, port-to-port spacing, edge-to-edge clearance, layer-to-layer alignment. Endpoint: POST /v1/photonics/drc-photonic. Returns violation list keyed to AIM rule IDs.
Published-paper cross-check. Pooled MAE across 5 SOI Neff papers (Bogaerts 2018, Pavanello 2020, Lim 2014, Selvaraja 2010, Xu 2017) sits within the analytical-model expected band vs published silicon-photonic references (~21% mean error vs FDFD-grade references, honestly disclosed). Trained AI surrogates (target ≥ 99% R² vs reference solver) are pending the FDTD training corpus.
Adversarial robustness harness. 108-case photonic adversarial smoke: 100% in-envelope pass + 100% OOD recall + 100% manufacturability-edge pass. Same harness pattern as the chiplet 110-geometry buyer-verify sweep.
Surrogate-accuracy check and cross-solver agreement: on the roadmap. The AI-surrogate accuracy check (target ≥ 99% R² vs reference solver) activates once the FDTD training corpus and trained surrogates land; all six primitives serve the analytical model today. Cross-solver agreement against a second full-wave solver is also on the roadmap.
Four photonic MCP tools within the 15-tool chipletos-mcp package
The standalone chipletos-mcp package ships 15 tools today, four of them photonic:
chipletos_predict_waveguide_mode— Neff / ng / propagation loss / bend loss for SOI strip waveguidesphotonic_signoff_health— availability of the analytical hot path, the full-wave reference runner, validation-suite readiness, surrogate versionphotonic_drc— AIM-Photonics-class DRC on a geometry listphotonic_validate_ieee— pooled MAE vs the published-paper reference corpus
Claude Desktop, Cursor, Codex, and any MCP-capable agent calls Photonic Signoff directly without an SDK install. No incumbent photonic-EDA vendor ships an MCP.
Scope and what's on the roadmap
The sub-brand inherits the chiplet stack's audit-and-disclose discipline. Today's published scope:
- Research Preview — analytical engine on all 6 primitives — ~21% mean error vs FDFD-grade references, honestly disclosed. Trained AI surrogates (target ≥ 99% R² vs reference solver) are pending the FDTD training corpus.
- Published-paper cross-check passes — pooled MAE sits within the analytical-model expected band vs published silicon-photonic references.
- Vendor-native validation on the roadmap — exporters are self-consistent; bit-perfect Lumerical / Omnisim native cert requires a customer-side license.
- Photonic VNA wet-lab queued — mirrors the chiplet $200-500K coupon pack pattern.
See Trust & Validation for the full validation-suite methodology, published-paper cross-check numbers, and the retraction registry.
Try it
Three public Modal endpoints live today, no auth required:/v1/photonics/signoff-health, /v1/photonics/drc-photonic, and /v1/photonics/validate-against-ieee. Plus the public waveguide-mode predictor wired into the playground tab. Eight more auth-gated routes (inverse design, Pareto, exporters) are listed on the sub-brand landing.
See the ChipletOS Photonic Signoff landing for the full primitive + endpoint matrix, or open the photonic playground to run the waveguide-mode predictor yourself.