The Platform for
Heterogeneous
Integration.
ChipletOS is the unified software coordination layer for next-generation semiconductor manufacturing, orchestrating physics-aware design and yield management across the entire silicon lifecycle.
Modular Manufacturing Subsystems
Glass PDK (Interposer)
The industry's only glass TGV impedance PDK. BEM solver with 4.0% MAE vs 6 IEEE papers (converged), 15.92M-row validated corpus, 901K separately versioned strict regime additions across HBM4, UCIE, EXTREME_TIGHT, WIDE_PITCH, MMWAVE, and ULTRA_HIGH_FREQ design corners (cited separately until canonical merge),995 active curated unique S2P assets in the registry, and 4 substrate classes + 21 materials. Schema-complete strict lane: 0 fallback rows, 0 duplicate schema-complete keys, every row has metal × via-type × wall-thickness × geometry × frequency in the feature schema.
Bondability (Yield)
Calibration-aware bondability screen for layout density, overlay, particles, and topography. Returns uncertainty, calibration state, corrective actions, and provenance through `POST /v1/bondability/bondability-signoff`.
IsoCompiler (EM Isolation)
Frequency-dependent isolation/crosstalk screen with baseline coupling, structure sizing, margin to target, validation tier, and provenance through `POST /v1/isocompiler/isolation-signoff`.
Packaging OS (Substrate)
Warpage prediction and multi-die assembly management. Kirchhoff FEM with sub-4ms latency and rectangular plate immunity.
Fab OS (Wafer)
ILC Zernike controller for wafer-level lithography correction. 982/1000 wins vs PID/LQR/MPC/SM/Fixed baselines in a synthetic analytical-plant Monte Carlo.
Thermal Core
GPU thermal modeling (H100/B200 stable). LBM solver with 720,000x analytical speedup. Honest about Marangoni gap in solutal modeling.
Precision Engineering
Across the Stack
Detailed workflows from pre-tapeout physics to final-yield substrate validation.
Manufacturability before Tapeout
- check_circleWafer mechanics & stress simulation
- check_circlePanel flexure prediction models
- check_circleDRC-aware EM isolation logic
Yield before the Fab
GDS-to-yield pipelines powered by contact physics and hybrid bonding validation.
View Validation Data open_in_newElectrical Substrate Physics
Deep integration for glass interposers and TGV architectures. We provide full-wave BEM impedance extraction and localized dielectric mapping.
Unified Access Layer
Control complex manufacturing hardware through a single, idempotent interface. ChipletOS treats physical machines as logical compute nodes.
import chiplet_os as cos
platform = cos.init("FAB_01_WEST")
# Orchestrate heterogeneous bonding
recipe = cos.Workflow(die_type="HBM3", substrate="Glass_2.5D")
recipe.apply_thermal_profile(cos.Physics.ISO_77)
platform.execute(recipe)
print(f"Current Yield: {platform.stats.yield_p99}%")
_
Validation & Precision
Converged Validators + Reproduced Field Solvers + BEM Mesh-Independence
BEM impedance predictions converge with two independent methods: IEEE closed-form moment-matching (4.0% MAE / 5.8% RMSE on 18 frequency-points × 5 peer-reviewed papers) and FastHenry2 (MIT, LGPL — 180 inductance comparisons). BEM is mesh-independent to 0.087% across a 16× refinement ratio (20 geometries), a standalone physics defensibility claim. AWS Palace FEM has been reproduced to completion with raw data preserved; Palace Z₀ at 5 GHz shows 10.07% median offset, with 10 of 50 simulations inside ±5%.
One-Command Deployment
The entire Genesis Glass PDK stack deploys as a production Docker image. BEM solver, ML surrogates, 29 Glass PDK tools, and the FastAPI service are containerized. GDS in, design report out — no local build.
genesis-glass-pdk --gds layout.gds \
--glass EagleXG \
--freq-ghz 28
Test Coverage
982 pytest-collected tests across 4,414 test files, with reproducibility scripts for current buyer-DD benchmarks.
Predictive R²
BEM v5 replay R² = 0.9520; geometry-challenge R² = 0.9516 on a 300K-row sample. The strict four-seed production cohort scores mean R² 0.9751 / 4.59% mean MAPE on unseen groups. The schema-complete strict lane reaches R² 0.9990065 / 0.7621% MAPE on a clean group-disjoint test. The production surrogate model achieves R² 0.9999966 / 0.0292% MAPE on a geometry-disjoint 6.75M-row test set, with HBM4 test MAPE 0.0154%, and route-backed 60-case signoff at mean worst-Z₀ 1.86% / max 6.65%. Strict buyer-regime additions total 901K separately versioned rows.
Lab-Ready Hooks
Direct integration with VNA, SAM, and CHF instruments for physical measurement calibration.
Quality & Inspection Plane
Every design report and DRC violation speaks IPC-A-610G, SEMI E10, and ISO 9000-3. One call to POST /v1/lots/intelligence-report aggregates defect profile, WM-811K yield patterns, CAPA recommendations, and multi-solver BEM provenance into a single release verdict.
AI-Agent-Native (MCP)
ChipletOS is the first glass PDK with a FastMCP tool server — drop it into Claude Desktop, Cursor, Codex, or any GPT-5+ tool-use stack and an agent can run lot-release reports, search defects, recommend CAPAs, trace provenance, and call inverse design + per-regime Palace- corrected impedance + 4-solver cross-physics witness + package signoff without leaving the editor.
{
"genesis-quality-plane": {
"url": "http://localhost:8000/mcp"
}
}
ChipletOS vs Industry Tools
| Feature | ChipletOS | Cadence Sigrity | Synopsys | Ansys HFSS |
|---|---|---|---|---|
| Glass TGV PDK | ✓ (only one) | ✗ | ✗ | ✗ |
| BEM Impedance | 10ms | 3D FEM (hours) | N/A | 3D FEM (hours) |
| Inverse design (target Z₀ → geometry) | ✓ surrogate + adjoint-BEM | ✗ | ✗ | ✗ |
| Cross-physics witness (BEM-FD vs surrogate-autograd) | r=0.99984 / 20 random geoms | ✗ | ✗ | ✗ |
| MCP / agent-callable signoff oracle | 30 tools live + 10 packaged agents | ✗ | ✗ | ✗ |
| Glass Material DB | 2.95M live + 901K versioned strict additions | Manual input | N/A | Manual input |
| S2P Library | 995 active files | Generate yourself | N/A | Generate yourself |
| Bondability Risk | Uncertainty + calibration state | ✗ | ✗ | ✗ |
| Isolation Signoff | Frequency sweep + margins | ✗ | ✗ | Manual sweep |
| Package Signoff Suite | Glass PDK/8/9 in 1 API call | ✗ | ✗ | ✗ |
| Multi-objective Pareto inverse design | ✓ Z₀ + IL + crosstalk + yield | ✗ | ✗ | Manual sweep |
| DRC validation against glass rules | ✓ IPC/SEMI defect codes | Cadence Pegasus (Si rules) | Synopsys IC Validator | ✗ |
| Auto-fab-coupon export (GDS+SOW+cost) | ✓ Amkor/MOSIS/generic profiles | Manual GDS only | Manual GDS only | ✗ |
| Cross-solver disagreement matrix | ✓ BEM+Palace+OpenEMS+gprMax | ✗ | ✗ | ✗ |
| Surrogate-vs-literature comparator | ✓ honest sim-vs-VNA flag | ✗ | ✗ | ✗ |
| Per-regime BEM-vs-Palace cal heads | 6/6 deployed: ULTRA_HIGH_FREQ 90.5% / HBM4 90.3% / WIDE_PITCH 87.6% / UCIE 81.6% / EXTREME_TIGHT 50.6% / MMWAVE 43.4% gap closure | ✗ | ✗ | ✗ |
| Buyer adversarial harness (verify-yourself) | 100/100 + 30/30 OOD recall in 5 min | ✗ | ✗ | ✗ |
| 95% conformal coverage interval on every prediction | ✓ distribution-free — HBM4 q=8.38 Ω cov 94.46%, UCIE q=6.03 Ω cov 95.41%, EXTREME_TIGHT q=35.10 Ω cov 94.42%, WIDE_PITCH q=9.84 Ω cov 94.44% | ✗ | ✗ | ✗ |
| Per-axis OOD diagnostic (which axis is OOD?) | ✓ 7-axis severity in/borderline/out | ✗ (scalar OOD only) | ✗ | ✗ |
| Open-source diff-pair scaling law | ✓ pip install glass-tgv-diffpair (Apache-2.0): log(Z₀_diff)=0.338·log(sep/d), R²=0.918, n=2.1M, 5 glasses | ✗ | ✗ | ✗ |
| Composite lab_readiness_score (single 0-100 buyer number) | ✓ send_to_lab ≥95 / send_with_extra_qc 80-94 / hold 60-79 / reject <60 on 3 routers | ✗ | ✗ | ✗ |
| Cross-solver matrix wired solvers | 3 of 5 wired + 4/5 spot-checks at 1-geom and 10-geom: BEM ✓ + Palace ✓ + FastHenry2 ✓; OpenEMS / gprMax honest skip when binary missing (no fabricated values) | ✗ | ✗ | ✗ |
| Honest fallback invariant (no fabricated proxy values anywhere) | ✓ 5 fallback categories documented; gates without measured signals contribute None and trigger partial_score=true; fab-coupon export refuses bundles when partial | ✗ | ✗ | ✗ |
From "tool" to "studio"
5 net-new endpoints turn the surrogate stack into a fab-ready design pipeline. Every endpoint is buyer-runnable in under 2 minutes.
Per-regime BEM-vs-Palace μ-correction cal heads
First successful cross-physics calibration on Genesis. Pattern reproduces across all 6 buyer regimes — not a single-experiment artifact. Latest retrain (2026-05-05) closes 72.5% of the pooled BEM-vs-Palace gap (17.10% → 4.71%) with an average per-regime gap closure of 74.0%. Palace is full-wave FEM cross-physics truth, not VNA measurement.
CHIPLETOS_PALACE_RESIDUAL_HEAD=1.The iceberg below the waterline
Genesis is not a single Glass-PDK tool. The platform ships 49 production API routers across 9 physics domains, a 32+ solver multiphysics stack (5 regimes), 5 EDA-vendor exporters, and a 65-file pytest contract suite — most of it under-cited until now.
api/main.py wires 48 of 49.genesis/local_solvers/: BEM + FDTD + FDTD-3D-real + FEM + LBM-3D-real + LBM-LES-turbulent + CFD + chemistry + elasticity + fluid + magnetics + optics + photonics + thermal + battery + geometry. Plus genesis/multiphysics/ couplers: thermal-structural · LBM-thermal-structural · FDTD-optical-lattice · Marangoni-zerog · generic. Lumerical sold for $107M as a niche FDTD vendor; Genesis ships the cross-physics layer on top.genesis/exporters/: AEDT template (Ansys HFSS), ADS bundle (Keysight), SPICE netlist (industry-standard), sealed report PDF (deliverables). One API call → exportable to Cadence Sigrity / Synopsys / Ansys / Keysight workflows. AGI sold for $700M (10× rev) on workflow-lock alone.tests/: 65 test files / 769 collected tests including test_chipletos_strict_api_contracts, test_lab_readiness_score, test_conformal_wrapper_api, test_per_dim_ood, test_cross_solver_consensus_5way, test_mcp_agents_pack, test_solver_physics_validation, plus regression-locked test suites. A competitor cannot reproduce these contract tests without our entire model and evidence chain.ls api/routers/*.py (49) · Solver list: ls genesis/local_solvers/*.py (17) · Exporter list: ls genesis/exporters/*.py (4) · Test list: find tests -name "test_*.py" | wc -l (65)Scale Your Heterogeneous Roadmap
Join the industry leaders moving from monolithic designs to high-yield chiplet architectures with ChipletOS.