Pricing

Start with the trial. Scale on what you actually use.

ChipletOS pricing tracks workflow consumption, not seat-counts. Light routes (predict-impedance, geometry-from-target, leaderboard) are flat-included; heavy workflows (signoff, Pareto, fab-coupon export) bill per run.

sciencePhotonic Signoff (alpha) — included in all paid tiers →

Free Trial

7-day evaluation window, 10 heavy workflow runs, full /v1 API surface (rate-limited).

  • Live PROV 7 surrogate (R²=0.9999966) + per-prediction CI + per-axis OOD
  • All 6/6 deployed Palace cal heads (UHF 90.5% · HBM4 90.3% · pooled 17→4.7% gap closure, latest retrain 2026-05-05)
  • 5/5 cross-EDA-vendor adapters (Cadence Sigrity / Synopsys SiP / Keysight ADS / Siemens HyperLynx / Ansys HFSS) with documented customer-side native-validation deferral
  • Composite lab_readiness_score 0–100 + verdict bands {send / send-with-QC / hold / reject}
  • ChipletOS Photonic Signoff (alpha) — 3 public photonic endpoints + waveguide-mode predictor (closed-form analytical hot path; trained AI surrogate on the roadmap)
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Per-Run

Pay-as-you-go per heavy workflow run (signoff / Pareto / fab-coupon export). Light routes (predict-impedance) included.

  • Per-foundry fab-coupon export (Amkor / MOSIS / generic stack-up profiles)
  • Touchstone .s2p/.s4p export verified at 5e-10 fidelity (4 roundtrip stress cases)
  • 29 cross-vendor pytest contracts + 250-cell grid stress + 5/5 vendors PASS
  • Persistent SQLite leaderboard for buyer-team submissions
  • ChipletOS Photonic Signoff (alpha) — auth-gated photonic inverse-design + Pareto + Lumerical / Omnisim / ANSYS / KLA Kandela / GDSII exporters
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Annual Buyer Package

Multi-buyer engineering team license, dedicated buyer playgrounds, MNDA-glass corpus access, priority support, custom calibration heads.

  • Pre-built buyer playgrounds (/buyers/cadence, /buyers/marvell, /buyers/nvidia, /buyers/intel, /buyers/synopsys, /buyers/corning, /buyers/absolics)
  • Per-vendor _NATIVE_VALIDATION_DEFERRED.md deliverables + customer-side native cert support
  • 1M-row CC-BY corpus + closed 6.75M-row strict-grouped surrogate corpus access
  • Custom Palace calibration heads on customer-supplied Palace truth
  • ChipletOS Photonic Signoff v1 — full 6-primitive surface (5 of 6 on a trained AI surrogate at ≥ 99% R² vs reference solver; waveguide on the closed-form analytical model) + 4 photonic MCP tools + higher-fidelity refresh on the roadmap
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Custom POC Pilot

6-week fixed-price pilot ($50K-$250K) — 10 designs, end-to-end through /v1/photonics or /v1/glass-pdk + cross-vendor exports + customer-side native cert + success-bonus annual-license credit.

  • Photonic-design pilot — 10 PIC designs through /v1/photonics/* (DRC + Pareto + IEEE cross-check + 5-vendor export); $150K fixed; $25K credit toward annual license if customer signs within 30 days
  • Chiplet-signoff pilot — 10 packaging cases through /v1/glass-pdk/* + /v1/coupons/* (R²=0.9999966 surrogate + route-backed signoff + 5-vendor export); $150K fixed; $25K annual-license credit
  • Day-1 dedicated ChipletOS engineer attached for the full 6 weeks; Tue+Thu syncs
  • Day-42 acceptance: ≥7 of 10 designs deliver measurable iteration-speedup + ≥3 DRC catches + ≥40 of 50 vendor-export imports valid
  • Scope-disclosed SOW + Day-21 mid-pilot termination clause (refund of unreceived Day-42 portion)
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What every plan includes

The cross-EDA workflow lock + the validation suite

  • • 17/17 validation-suite gates PASS at every commit. Includes multi-physics cal heads trained against CalculiX FEM truth corpora (thermal 1.14 K, mechanical 4.33 µm), patent-bundle integrity, API contract drift, witness-freshness, cross-PROV consistency, synthetic-data sniffer, phantom-cite detector.
  • • 5/5 cross-EDA-vendor adapters end-to-end roundtrip-cert (29 pytest contracts + 250-cell grid + 50 Debye stress cells + 8 malformed-input fuzz cells = 337 adapter-cell verifications).
  • • Live PROV 7 surrogate adversarial fuzz: 56,000 random inputs, 0 crashes, 0 outside-physical-band, p95 latency 6.5–8.4 ms.
  • • Scope-disclosed: 13 cross-vendor edge-case bugs found via malformed fuzz, 13 fixed (N1 NaN guard + N2 physical-validity check + N3 safe-name truncate).
  • • 39-entry retraction registry (audit-trail-complete, "show your scars" rigor).